1. Field of the Invention
The present invention relates to semiconductor devices and methods of manufacturing semiconductor devices.
2. Description of the Related Art
In recent years, flat panel displays such as liquid crystal display devices and electroluminescence (EL) display devices have attracted attention.
Driving methods of these flat panel displays include a passive matrix method and an active matrix method. An active matrix method has advantages over a passive matrix method such as the fact that power consumption is lowered, definition is heightened, a larger substrate can be used, and the like.
Further, when an active matrix method is used, pixel TFTs and a driver circuit for driving the pixel TFTs can be formed over the same substrate. Note that a TFT refers to a thin film transistor.
A circuit has superior characteristics (e.g., low power consumption and high-speed response) in the case where the circuit includes both n-type thin film transistors (NTFTs) and p-type thin film transistors (PTFTs), compared with the case where the circuit includes either n-type thin film transistors or p-type thin film transistors.
For example, Patent Document 1 (Japanese Published Patent Application No. H6-37313) discloses a method of forming n-type thin film transistors and p-type thin film transistors in which impurity doping by an ion implantation method is utilized.
Impurity doping by an ion implantation method refers to a method in which an ionized impurity (a dopant) is accelerated by high voltage and implanted into a semiconductor.
Therefore, when an ion implantation method is used, source and drain regions in a semiconductor layer are damaged by ion implantation and resistance thereof increases. If the resistance of the source and drain regions in the semiconductor layer increases, operation of a TFT is delayed or stopped.
Accordingly, an anneal should be performed in order to recover the damage so that the resistance of the source and drain regions is lowered. However, if an anneal is performed, crystallinity of channel formation regions in the semiconductor layer tends to vary at random from TFT to TFT.
This is because the channel formation region is randomly crystallized by high temperature treatment such as an anneal when the crystallinity of the channel formation region is low (this tendency is particularly evident when the channel formation region is formed of an amorphous semiconductor). Therefore, electrical characteristics vary from TFT to TFT due to an anneal.
In addition, an anneal results in increase in the number of manufacturing steps and in manufacturing time.
Further, in a TFT manufacturing process which requires high temperature treatment such as an anneal, TFTs can not be directly formed over a substrate with low heat resistance (e.g., a substrate formed of a resin material).
Further, in an ion implantation method, variation in the amount of ions implanted easily occurs due to an apparatus. Examples of variation due to an apparatus include variation in the amount of ions implanted from lot to lot due to degradation of filament, and variation in the amount of ions implanted into a substrate due to contaminants in a process chamber (when the process is performed repeatedly, a dopant becomes dust and adheres to an inner wall of the process chamber, an electrode, or the like).
As an alternative to an ion implantation method, there is a thermal diffusion method.
In a thermal diffusion method, a heat-resistant mask is formed using a heat-resistant material (e.g., a silicon oxide), high temperature heat treatment (equal to or higher than 800° C.) is performed in an atmosphere containing an impurity element which imparts conductivity, and then, the heat-resistant mask is removed.
Since heating treatment in a thermal diffusion method is performed at higher temperature than heat treatment in an ion implantation method, a problem of an ion implantation method cannot be solved.
Further, in an ion implantation method, separate masks for implanting an n-type dopant and a p-type dopant are necessary.
A thermal diffusion method requires different masks: a heat-resistant mask for selectively diffusing an n-type dopant and a heat-resistant mask for selectively diffusing a p-type dopant.
Further, in a thermal diffusion method, a mask (e.g., a resist) which cannot withstand processing at 800° C. or higher is used to form a mask which can withstand processing at 800° C. or higher. Accordingly, problems of increase in the number of manufacturing steps and in manufacturing time are caused.